Dan NICULA

DIGITAL ELECTRONICS


Overview | Contents | Prerequisites | Labs | Bibliography

FPGA Related Labs


Overview:

The curricula of this course is according to IEEE Computer Society/ACM Computing Curriculum - Computer Engineering The logic design area covers the digital building blocks, tools, and techniques in digital design. Emphasis is on a building-block approach. This subject area comprises 2 semester hours.


Contents:

DIG1. Digital Computers and Information

  • 1.1. Digital Computers
  • 1.2. Number Systems
  • 1.3. Arithmetic Operations
  • 1.4. Alphanumeric Codes

    DIG2. Combinatorial Logic Circuits

  • 2.1. Binary Logic and Gates
  • 2.2. Boolean Algebra
  • 2.3. Logic Functions Representation
  • 2.4. Synplifying a Boolean Function Using a Map
  • 2.5. Logic Gates
  • 2.6. Integrated Circuits

    DIG3. Combinatorial Logic Design

  • 3.1. Combinational Circuits
  • 3.2. Design Topics
  • 3.3. Analysis Procedure
  • 3.4. Design Procedure
  • 3.5. Decoders
  • 3.6. Encoders
  • 3.7. Multiplexers
  • 3.8. Binary Adders
  • 3.9. Binary Subtractors
  • 3.10. Binary Ader-Subtractors
  • 3.11. HDL Representation- VHDL/Verilog

    DIG4. Sequential Logic Circuits

  • 4.1. Sequential Circuit Definition
  • 4.2. Latches
  • 4.3. Flip-flops
  • 4.4. Sequencial Circuits: Structure and Behaviour
  • 4.5. Sequencial Circuits Representation
  • 4.6. Sequencial Circuits Design
  • 4.7. Particular State Encoding
  • 4.8. Particular Automata
  • 4.9. Sequencial Circuits Analysis
  • 4.10. Registers
  • 4.11. Counters

    DIG5. Memory and Programmable Logic Devices

  • 5.1. Read Only Memory
  • 5.2. Random Access Memory
  • 5.3. Programmable Logic Devices

    DIG6. Digital Systems Design


    Prerequisites:


    Labs:

    1. Oscilloscope: Tool for measurement of digital signals.
    2. Laboratory Presentation: Computer, Programmable Power Supply, Function Generator, Oscilloscope, Multimeter.
    3. Bipolar transistor: Switching Charateristics
    4. Integrated Logic Gates: Features and Voltage Transfer Characteristics.
    5. Binary and Decimal Numbers. Building a "digital signal generator"
    6. Logic Gates.
    7. Multiplexer/Encoder.
    8. Combinatorial Hazard: Why Digital Systems do not always work?
    9. Finite State Machine.
    10. Timer: Clock Generator
    11. Modelling digital systems in Verilog/VHDL
    12. Modelling digital systems in Verilog/VHDL
    13. Pre-assesment preparation
    14. Assesment.

    FPGA related Labs:

    Digilent: Xilinx Spartan 3 Demo Board Manual.

    Intronix: Logic Analyzer Manual.

    1. LAB 1: Logic Gates. (PDF) (BIT)
    2. LAB 2: BCD to 7-segment Display Decoder. (PDF) (BIT)
    3. LAB 3: Adders. (PDF) (BIT)
    4. LAB 4: Registers. (PDF) (BIT)
    5. LAB 5: FSM. (PDF)(BIT)
    6. LAB 6: Complex System. (PDF)(BIT)

    Bibliography: